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HD74LV2G74AUSE

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Manufacturer RENESAS ELECTRONICS CORP
Part Package Code SOIC
Package Description VSSOP, TSSOP8,.12,20
Pin Count 8
Reach Compliance Code compliant
HTS Code 8542.39.00.01
Family LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G8
JESD-609 Code e0
Length 2.3 mm
Load Capacitance (CL) 50 pF
Logic IC Type D FLIP-FLOP
Max Frequency@Nom-Sup 45000000 Hz
Max I(ol) 0.006 A
Moisture Sensitivity Level 1
Number of Bits 1
Number of Functions 1
Number of Terminals 8
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code VSSOP
Package Equivalence Code TSSOP8,.12,20
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
Packing Method TR
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 17.5 ns
Propagation Delay (tpd) 42.5 ns
Qualification Status Not Qualified
Seated Height-Max 0.9 mm
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 1.65 V
Supply Voltage-Nom (Vsup) 1.8 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 20
Trigger Type POSITIVE EDGE
Width 2 mm
fmax-Min 110 MHz

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